Testbench
Test bench is an abstracted model of the application world surrounding the DUT. Test bench also can be thought as a layer of abstraction that…
Bus functional models (BFM)
Bus functional model(BFM) is a model of physical interfaces of the DUT. Presents all the bus level scenario that DUT can experience on the attached…
Verification goggle
The way we need a special goggles to see 3D movies clearly, verification goggles is required to see the verification world correctly. Functional verification is…
Are your A+ engineers fire fighting all the time?
Scene: Fire everywhere Action For god’s sake, let’s just patch that code one more time and get it out of the door. We understand problem…
Verification Planning : Anchor for execution
“In preparing for battle, I have always found that plans are useless, but planning is indispensable.” –General Dwight D. Eisenhower A perfect planning is, planning…
UVM dissection – All class hiearchy
UVM code reuse is predominantly a framework reuse model. It’s effective application requires certain level of source code exposure as discussed in the “UVM dissection –…
UVM dissection – statistics
UVM code reuse is predominantly a framework reuse model. It’s effective application requires certain level of source code exposure as discussed in the “UVM dissection –…
UVM dissection – Why it’s needed?
Universal verification methodology(UVM) has become ubiquitous with functional verification but it’s not the complete picture of the functional verification. It’s hard to find any recent verification…
Functional verification – A Bigger picture
What is Functional verification? Universal verification methodology (UVM) and System Verilog (SV) was the answer I got. Verification methodology and high-level verification language (HVL) are…
Execution and Closure of the error injection verification
Execution and closure of error injection verification is the last step. Ordering the execution of the verification plan with the following tips can help improve…